Many integrated circuits now employ as many as 300 to 400 input or output pins. In many cases, these outputs must be able to sink and source large amounts of current. With conventional circuit techniques, this results in large switching currents that can generate noise in internal components on the chip, contributing to errors.
The prior art has attempted to address this problem by sequentially turning on different output drivers in a timed sequence. An example is illustrated in FIG. 1, in which upper and lower inputs are turned on in sequence. In these sequential designs, the output transistors operate in the saturated region for only a short time and then change to the linear region resulting in a high rate of current change per unit time (di/dt). It is the di/dt which produces noise levels throughout the circuit by the voltage Vn=Ldi/dt induced in the circuit by the inductance between the metal interconnections and the bond wires. The art has long desired a circuit that would produce the required amount of output current with the minimum amount of noise, or maintaining the lowest possible value of di/dt.